Hacker Newsnew | past | comments | ask | show | jobs | submitlogin
The Cons Microprocessor [pdf] (dspace.mit.edu)
69 points by gjvc on March 28, 2022 | hide | past | favorite | 14 comments


This might warrant a "(1974)" in the title. It's about the processor for the legendary LISP machine from the MIT's AI Lab. The overview:

The CONS microprocessor is a general purpose processor designed for easy programming of list manipulation and emulation of complex order codes. It is the central processor in the lisp machine project, where it emulates the 16 bit order code produced by the lisp compiler. It is organized around three 32 bit data paths: an A source, an M source, and an output bus. Source specifications and functions applied to the data are entirely under control of a 42 bit microcode word.

It's cool that a new CPU can be presented in a 23-page document, but I did not read it all to see how detailed it really gets.


It is the precursor to the MIT Lisp Machine, the design that was used within MIT and commercialized by LMI, TI and initially by Symbolics was the CADR [1].

[1] http://www.unlambda.com/cadr/memo528.html


Symbolics sold an only minor improved CADR as their "LM-2" in small quantities. The CADR wasn't really something one would sell to customers, since it was difficult to produce and maintain. The next generation then started with the 3600, which was a larger improvement (including its 36bit architecture).


Speaking of Lisp CPUs, does anyone have documentation on what the unproduced Sunstone had for an instruction set?


Guess unless we have an implementation of modern days (emulation or …) not sure what we can do about a 1974 design.

Or compare with say ulisp etc


Not this process but a relative, might be of interest: https://github.com/dseagrav/ld


Does it have hardware GC? (garbage collector)


No, object allocation and garbage collection are too high level to be handled in a processor of this degree of complexity, besides that you'd lock yourself in in a way that would be hard to change later on if you end up needing more flexibility.


Intel famously tried that with the iAPX 432[0]. It design appears to have been influenced by Lisp machines but with more features and using Ada instead of Lisp. GC support still required OS support, however.

[0]:https://en.wikipedia.org/wiki/Intel_iAPX_432


Oh, that's interesting, I always thought of that 432 as the 'ADA' chip, I never realized that the Lisp machine was an input to it. Makes me wonder if it would have been any good at running a slightly hardware accelerated Lisp.


I can't say for sure that Lisp machines influenced it (the ISA predates me by at least two decades), but it definitly feels to me like it was because it's an ISA build for a language.


Ok, so a GC would have to be implemented in lisp?


Either that, or in the (rather limited) machine language the processor supports. But there is no push to solve this in a particular way.

Here is an article about the Lisp Machine's garbage collection:

http://funcall.blogspot.com/2009/05/before-i-got-distracted-...


Later CPUs from Symbolics had some hardware support for the GC, which was largely implemented in Lisp and/or microcode.




Guidelines | FAQ | Lists | API | Security | Legal | Apply to YC | Contact

Search: