Hacker Newsnew | past | comments | ask | show | jobs | submitlogin

Apple put some special sauce in the M1 to help make rosetta fast. Support for the x86 TSO memory model, for one thing.


Also ARM now has a bunch of instructions that are blatantly there for efficient x86 emulation, though ARM won't tell you that in the docs.


IBM POWER9 supports some memory ordering instructions that (as I understand) would in theory be useful for x86 emulation, but a) I'm unsure if anyone actually uses them and b) They are removed from POWER10


I don't think Apple generates those, though.


Can that secret sauce just be to slow down Intel based macs in the OS layer?




Consider applying for YC's Summer 2026 batch! Applications are open till May 4

Guidelines | FAQ | Lists | API | Security | Legal | Apply to YC | Contact

Search: